Research Webzine of the KAIST College of Engineering since 2014
Fall 2025 Vol. 25In this research, Professor Kyung Min Kim’s team developed a three‑terminal “neuransistor” that unifies excitatory and inhibitory dynamics, enabling a hardware liquid‑state machine that outperforms conventional echo‑state networks in terms of chaotic time‑series predictions.

The neuransistor chip, developed at KAIST, stores and computes data in the same physical spot, allowing it to generate both excitatory and inhibitory signals like a brain cell and to decode complex time‑series streams in real time. A neuransistor, a newly coined term combining "neuron" and "transistor," reproduces key neuronal behaviors. By eliminating the rigid separation between memory and logic that has constrained conventional computers, the device ushers in a far more efficient breed of AI hardware.
Standard digital machines excel at handling static images or numerical data, yet they struggle with continuous inputs such as speech, heart rate traces, or drone sensor data. These signals must be divided into frames and fed to power‑hungry neural networks. The neuransistor, in contrast, processes the raw flow directly. It is fabricated by stacking nanometer‑thin titanium oxide (TiO₂) and aluminum oxide (Al₂O₃) films. A highly mobile two‑dimensional electron gas (2DEG) forms at the interface between these two materials and serves as the transistor channel. A positive gate pulse releases lightly trapped electrons and increases the conductivity, producing an excitatory state. A negative pulse traps carriers and suppresses the current, creating an inhibitory state. Both responses fade within milliseconds, allowing the device to reset itself without external intervention.
A small bias on the source terminal finely tunes the amplitude and duration of each spike. Stepping the bias through a series of values generates dozens of internal states in a single device, exactly what a liquid‑state machine (LSM) needs to transform raw data into rich patterns. External random‑mask circuits are therefore unnecessary, simplifying the hardware design.

The neuransistor’s oxide bilayer is fabricated via low-temperature atomic layer deposition (<300 °C), ensuring compatibility with standard semiconductor processes and flexible substrates. These devices can be integrated with sensors to process signals locally without sending data to external servers. Their CMOS compatibility and operational stability make them ideal candidates for on-chip liquid-state machine reservoirs.
“A Neuransistor with Excitatory and Inhibitory Neuronal Behaviors for Liquid State Machine” was published in Advanced Materials on April 8, 2025.
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